1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device, particularly, a MOSFET of LDD structure.
2. Description of the Related Art
Recently, a poly-Si gate is widely used in MOSFETs. In general, RIE which permits a high processing accuracy is employed in general for forming the poly-Si gate in view of the demand for miniaturization of the MOSFET.
FIGS. 1A to 1G collectively show a conventional method of manufacturing a MOSFET by employing RIE. In the first step, an oxide film (not shown) is formed on a p-type silicon substrate 41, followed by forming a silicon nitride film (not shown) on the oxide film. The silicon nitride film is patterned by RIE, followed by implanting boron ions into the substrate using the silicon nitride pattern as a mask so as to form a channel-stopping region 42. A selective oxidation is then applied to form a field oxide film 43 on the region 42, followed by removing the oxide film and the silicon nitride film formed previously (FIG. 1A).
In the next step, a gate oxide film 44 is formed on the silicon substrate 41 (FIG. 1B). After formation of the gate oxide film, a poly-Si film 45 is deposited on the entire surface and, then, doped with an impurity (FIG. 1C). The poly-Si film 45 is selectively etched by RIE to form a poly-Si pattern 45a which finally acts as a gate electrode (FIG. 1D). Further, a resist pattern 46 is formed to cover the poly-Si pattern 45a (FIG. 1E). Then, As ions are implanted into the substrate using the resist pattern 46 as a mask, so as to form source and drain regions 47. After formation of the source and drain regions, the resist pattern 46 is removed (FIG. 1F), followed by implanting phosphorus (P) ions into the substrate at a low concentration using the poly-Si pattern 45a as a mask so as to form diffusion regions 48 of a low phosphorus concentration. Since the poly-Si pattern 45a is used as a mask, the ion implantation is performed by self-alignment. The diffusion regions 48 thus formed serve to achieve an electric connection between the source and drain regions 47 and the channel region so as to form a MOSFET of an LDD structure (FIG. 1G).
RIE, which permits a high processing accuracy, is suitable for use in the formation of a poly-Si gate in a finely miniaturized MOSFET. The etching function of RIE is based on both the chemical reaction involving plasma and the physical effect produced by the ion bombardment. Thus, in the selective etching, which employs RIE, of the poly-Si film 45 shown in FIG. 1C, various energized particles within the plasma such as ions, electrons and photons do damage to the gate oxide film near the poly-Si gate and to the interface between the gate oxide film and the substrate. The damage is caused by, for example, the dislocation in the arrangement of atoms, which is derived from the impact of the energized ion bombardment. The damage also includes the generation of electron-hole pairs, which accompanies the formation of primary ions within the gate oxide film, said primary ions being caused by far ultraviolet rays coming from the plasma or by soft X-rays generated from the counter electrode. Further, the electrons generated by the dislocation in the arrangement of atoms or by the formation of the primary ions serve to form secondary ions, with the result that the secondary ions and the defect in the gate oxide film perform a mutual function. This damage done to the gate oxide film and to the interface between the gate oxide film and the substrate results in a low reliability of the MOSFET. In many cases, this damage can be recovered by an annealing treatment. However, no effective means for recovery is available with respect to the damage which cannot be recovered by the annealing treatment.
As described above, the method of manufacturing a semiconductor device shown in FIG. 1 comprises a step of forming a poly-Si gate for a MOSFET by means of RIE, with the result that the gate oxide film and the interface between the gate oxide film and the substrate are directly exposed to various particles generated in the step of RIE. It follows that the conventional method shown in FIG. 1 is defective in that various damages is done to the gate oxide film near the poly-Si gate and to the interface between the gate oxide film and the substrate.